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  lt1797 1 1797fb typical application features description 10mhz, rail-to-rail input and output op amp in sot-23 the lt ? 1797 is a unity-gain stable 10mhz op amp available in the small sot-23 package that operates on all single and split supplies with a total voltage of 2.7v to 12v. the amplifier draws 1ma of quiescent current and has a slew rate of 2.25v/s. the input common mode range of the lt1797 includes both rails, making it ideal for current sensing applications. the input stage incorporates phase reversal protection to prevent false outputs from occurring when the inputs are driven beyond the supplies. protective resistors are included in the input leads so that current does not become excessive when the inputs are forced above or below the supplies. the output of the lt1797 can swing to within 50mv of v + and 8mv of v C without drawing excess current in either condition. the amplifier can drive loads up to 25ma and still maintain rail-to-rail capability. the lt1797 op amp is available in the space saving 5-lead sot-23 package. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks and thinsot and over-the-top are trademarks of linear technology corporation. all other trademarks are the property of their respective owners. fast compact C48v current sense applications n rail-to-rail input and output n small sot-23 package n gain bandwidth product: 10mhz n C40c to 85c operation n slew rate: 2.25v/s n low input offset voltage: 1.5mv max n high output current: 25ma min n specified on 3v, 5v and 5v supplies n high voltage gain: 1000v/mv 10k load n high cmrr: 96db typ n high psrr: 90db typ n input bias current: 300na max n input offset current: 25na max n low profile (1mm) sot-23 (thinsot?) package n portable instrumentation n rail-to-rail buffer amplifiers n low voltage signal processing n driving a/d converters n battery-powered systems small-signal response C + lt1797 0.1f r1 reduces q1 dissipation q1 fmmt493 0.003 1% 3w bzx84c6v8 v z = 6.8v C48v supply (C42v to C56v) 3.3k 0805 3 30.1 1% i sense + C r1 4.7k v s = 3v 1k 1% v out = 3v C 0.1 ? i sense i sense = 0a to 30a accuracy 3% C48v load 1797 ta01 settles to 1% in 2s,1v output step v out 1797 ta01b v s = 2.5v a v = 1 r l = 10k downloaded from: http:///
lt1797 2 1797fb pin configuration absolute maximum ratings total supply voltage (v + to v C ) .............................. 12.6v input differential voltage ....................................... 12.6v input current ........................................................ 10ma output short-circuit duration (note 2) ........ continuous operating temperature range (note 3) ...C40c to 85c specified temperature range ..................C40c to 85c junction temperature ........................................... 150c storage temperature range .................. C65c to 150c lead temperature (soldering, 10 sec)................... 300c (note 1) 4 5 3 1 out v C +in v + Cin top view s5 package 5-lead plastic tsot-23 2 + C t jmax = 150c, ja = 250c/w order information lead free finish tape and reel part marking package description temperature range lt1797cs5#pbf lt1797cs5#trpbf ltlm 5-lead plastic tsot-23 C40c to 85c lt1797is5#pbf lt1797is5#trpbf lttl 5-lead plastic tsot-23 C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v s = 3v, 0v; v s = 5v, 0v, v cm = v out = half supply, pulse power tested, unless otherwise specified. (note 3) symbol parameter conditions min typ max units v os input offset voltage 0c t a 70c C40c t a 85c ll 1 1.5 2.53.0 mvmv mv input offset voltage drift (note 4) l 52 0 v / c i b input bias current v cm = v C v cm = v + ll C300 C150 50 100 nana input bias current drift l 0.1 na/c i os input offset current v cm = v C v cm = v + ll 1010 2525 nana input noise voltage 0.1hz to 10hz 1.5 v p-p e n input noise voltage density f = 10khz 20 nv/ hz i n input noise current density f = 10khz f = 10khz, v cm = v cc C 0.3v 0.230.15 pa/ hz pa/ hz r in input resistance differential common mode, v cm = 0v to v s C 1.3v 200 330 100 k m c in input capacitance 4p f cmrr common mode rejection ratio v cm = 0v to v s C 1.3v v s = 5v, v cm = 0v to 5v v s = 3v, v cm = 0v to 3v ll l 8264 60 9672 68 dbdb db downloaded from: http:///
lt1797 3 1797fb electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v s = 3v, 0v; v s = 5v, 0v, v cm = v out = half supply, pulse power tested, unless otherwise specified. (note 3) symbol parameter conditions min typ max units input voltage range l 0v s v a vol large-signal voltage gain v s = 3v, v o = 0.5v to 2.5v, r l = 10k l 200150 1000 v/mv v/mv v s = 5v, v o = 0.5v to 4.5v, r l = 10k l 400300 1000 v/mv v/mv psrr power supply rejection ratio v s = 2.7v to 12v, v cm = v o = 1v l 80 90 db minimum supply voltage l 2.5 2.7 v v ol output voltage swing low no load, input overdrive = 30mv i sink = 5ma i sink = 10ma ll l 8 80 150 30 160250 mvmv mv v oh output voltage swing high no load, input overdrive = 30mv i source = 5ma i source = 10ma, v s = 5v i source = 10ma, v s = 3v ll l l v s C 0.14 v s C 0.30 v s C 0.39 v s C 0.59 v s C 0.05 v s C 0.2 v s C 0.3 v s C 0.3 vv v v i sc short-circuit current v s = 5v v s = 3v 2515 4525 mama i s supply current l 1.1 1.5 2.0 mama gbw gain bandwidth product (note 5) f = 100khz 0c t a 70c C40c t a 85c ll 6.05.0 4.5 10 mhz mhzmhz sr slew rate (note 5) a v = C1 0c t a 70c C40c t a 85c ll 1.31.1 1.0 2.25 v/s v/s v/s t r output rise time 10% to 90%, 0.1v step, r l = 10k 55 ns t f output fall time 10% to 90%, 0.1v step, r l = 10k 55 ns t s settling time v s = 5v, v out = 2v to 0.1%, a v = C1 1.6 s thd distortion v s = 3v, v out = 1.8v p-p , a v = 1, r l = 10k, f = 1khz 0.001 % fpbw full-power bandwidth (note 6) v out = 2v p-p 360 khz the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v s = 5v, v cm = 0v, v out = 0v, pulse power tested unless otherwise specified. (note 3) symbol parameter conditions min typ max units v os input offset voltage 0c t a 70c C40c t a 85c ll 1 1.5 2.53.0 mvmv mv input offset voltage drift (note 4) l 5 20 v/c i b input bias current v cm = v C v cm = v + ll C300 C150 50 100 nana input bias current drift l 0.1 na/c i os input offset current v cm = v C v cm = v + ll 1010 2525 nana input noise voltage 0.1hz to 10hz 1 v p-p e n input noise voltage density f = 10khz 20 nv/ hz i n input noise current density f = 10khz f = 10khz, v cm = 4.7v 0.230.15 pa/ hz pa/ hz downloaded from: http:///
lt1797 4 1797fb electrical characteristics the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c.v s = 5v, v cm = 0v, v out = 0v, pulse power tested unless otherwise specified. (note 3) symbol parameter conditions min typ max units r in input resistance differential common mode, v cm = C5v to 3.7v 200 330 100 k m c in input capacitance 4p f input voltage range l C5 5 v cmrr common mode rejection ratio v cm = C5v to 3.7v v cm = C5v to 5v ll 7866 9676 dbdb a vol large-signal voltage gain v o = 4v, r l = 10k l 400300 1000 v/mv v/mv v ol output voltage swing low no load, input overdrive = 30mv i sink = 5ma i sink = 10ma ll l C4.99C4.92 C4.85 C4.97C4.87 C4.79 vv v v oh output voltage swing high no load, input overdrive = 30mv i source = 5ma i source = 10ma ll l 4.844.70 4.61 4.954.80 4.70 vv v i sc short-circuit current (note 2) short to gnd 30 50 ma psrr power supply rejection ratio v s = 1.35v to 6v l 80 90 db i s supply current l 1.40 2.25 3.00 mama gbw gain bandwidth product f = 100khz 0c t a 70c C40c t a 85c ll 6.55.5 5.0 11 mhz mhzmhz sr slew rate a v = C1, rl = , v o = 4v, measured at v o = 2v 0c t a 70c C40c t a 85c ll 1.501.25 1.10 2.50 v/s v/s v/s t r output rise time 10% to 90%, 0.1v step, r l = 10k 55 ns t f output fall time 10% to 90%, 0.1v step, r l = 10k 55 ns t s settling time v out = 4v to 0.1%, a v = 1 2.6 s fpbw full-power bandwidth (note 6) v out = 8v p-p 100 khz note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: a heat sink may be required to keep the junction temperature below absolute maximum. note 3: the lt1797c is guaranteed to meet 0c to 70c specifications and is designed, characterized and expected to meet the extended temperature limits, but is not tested at C40c and 85c. the lt1797i is guaranteed to meet specified performance from C40c to 85c. note 4: this parameter is not 100% tested. note 5: v s = 3v limit guaranteed by correlation to 5v tests. note 6: full-power bandwidth is calculated from the slew rate: fpbw = sr/2vp downloaded from: http:///
lt1797 5 1797fb output saturation voltage vs load current (output high) output saturation voltage vs load current (output low) output saturation voltage vs input overdrive output short-circuit current vs temperature 0.1hz to 10hz noise voltage input noise voltage density vs frequency supply current vs supply voltage minimum supply voltage input bias current vs common mode voltage typical performance characteristics total supply voltage (v) 0 0 supply current (ma) 0.2 0.6 0.8 1.0 6789 1.8 1797 g01 0.4 12345 101112 1.2 1.4 1.6 t a = 125c t a = 25c t a = C55c total supply voltage (v) C300 input offset voltage change (v) C100 100 300 C200 0 200 1.0 1.5 2.0 3.0 4.0 1797 g02 5.0 0.5 0 2.5 3.5 4.5 t a = 125c t a = C55c t a = 25c common mode voltage (v) C200 input bias current (na) C100 0 100 C150 C50 50 1.0 2.0 3.0 4.0 1797 g03 5.0 0.5 0 1.5 2.5 3.5 4.5 v s = 5v, 0v t a = 25c t a = 125c t a = C55c sourcing load current (a) 1 0.01 output saturation voltage (v) 0.1 1 100 10 10m 1m 1797 g04 v s = 2.5v v od = 30mv t a = 25c t a = 125c t a = C55c input overdrive (mv) 0 output saturation voltage (mv) 60 80 100 120 140 30 50 100 1797 g06 40 20 0 70 90 110 130 150 50 30 10 10 20 40 60 70 80 90 v s = 2.5v i out = 0 output high output low sinking load current (a) 0.01 output saturation voltage (v) 0.1 1 100 1m 10m 1797 g05 0.001 10 1 t a = 125c v s = 2.5v v od = 30mv t a = 25c t a = C55c temperature (c) C50 output current (ma) 40 45 50 25 75 1797 g07 35 30 C25 0 50 100 125 25 20 v s = 2.5v sourcing current sinking current time (sec) noise voltage (1v/div) 2468 1797 g08 10 1 03579 v s = 5v frequency (hz) 20 input noise voltage density (nv/hz) 40 60 80 100 10 1k 10k 100k 1797 g09 0 100 v s = 2.5v downloaded from: http:///
lt1797 6 1797fb typical performance characteristics slew rate vs temperature gain bandwidth product and phase margin vs supply voltage psrr vs frequency cmrr vs frequency gain bandwidth product and phase margin vs rf and rg output impedance vs frequency input noise current density vs frequency gain and phase shift vs frequency gain bandwidth product vs temperature frequency (hz) input noise current density (pa/ hz ) 10 1k 10k 100k 1797 g10 100 v s = 2.5v 1.21.0 0.8 0.6 0.4 0.2 0 frequency (hz) 0 gain (db) phase (deg) 60 70 C10C20 5020 4030 10 10k 1m 10m 100m 1797 g11 C30 C40 80 100C60 C80 600 4020 C20 C100 100k v s = 2.5v phase gain temperature (c) C50 gain bandwidth product (mhz) 11.5 25 1797 g12 10.0 9.0 C25 0 50 8.58.0 12.011.0 10.5 9.5 75 100 125 v s = 5v v s = 2.5v f = 100khz temperature (c) C50 C25 1.0 slew rate (v/s) 2.0 3.5 0 50 75 1797 g13 1.5 3.0 2.5 25 100 125 rising falling v s = 2.5v total supply voltage (v) 0 8 gain bandwidth product (mhz) phase margin (deg) 10 12 9 11 13 2 468 1797 g14 10 1 3 5791 11 2 3530 45 55 40 50 60 phase margin gain bandwidth product f = 100khzr f = r g = 1k r f = r g = () 1k 10 gain bandwidth product (mhz) phase margin (deg) 12 14 10k 100k 1797 g15 11 13 20 40 60 10 30 50 phase margin gain bandwidth product v s = 5v frequency (hz) 20 power supply rejection ratio (db) 80 9010 0 7040 6050 30 1k 100k 1m 10m 1797 g16 C10 10k v s = 2.5v negative supply positive supply frequency (hz) 40 common mode rejection ratio (db) 100 110 3020 9060 8070 50 1k 100k 1m 10m 1797 g17 10 10k v s = 2.5v frequency (hz) 100 1k 0.01 output impedance () 1 100 10k 100k 1m 10m 1797 g18 0.1 10 gain = 100 gain = 10 v s = 2.5v downloaded from: http:///
lt1797 7 1797fb typical performance characteristics undistorted output swingvs frequency total harmonic distortion + noise vs frequency total harmonic distortion + noise vs load resistance total harmonic distortion + noise vs output voltage amplitude large-signal response small-signal response open-loop gain settling time to 0.1% vs output step capacitive load handling overshoot vs capacitive load output voltage (v) C5 change in input offset voltage (50v/div) 1797 g19 C4 C3 C2 C1 012 345 v s = 5v r l = 50k r l = 2k r l = 10k settling time (s) 1.0 output step (v) 43 2 1 0 C1C2 C3 C 4 2.6 1797 g20 1.4 1.8 2.2 3.0 2.4 1.2 1.6 2.0 2.8 a v = 1 a v = 1 a v = C1 v s = 5v a v = C1 capacitive load (pf) 10 20 overshoot (%) 25 30 35 40 100 1000 10000 1797 g21 15 10 50 45 50 a v = 1 a v = 5 a v = 10 a v = 2 v s = 2.5v frequency (hz) 2 output swing (v p-p ) 4 6 8 10 100 10k 100k 1m 1797 g22 0 1k 12 1 3 5 7 9 11 a v = 1 v s = 5v v s = 1.5v frequency (hz) 10 100 0.0001 thd + noise (%) 0.01 1 1k 10k 100k 1797 g23 0.001 0.1 a v = C1 a v = 1 r l = 10k v s = 3v, 0v v out = 1.8v p-p v cm = 1v load resistance to ground (k) 0.01 thd + noise (%) 0.1 1 10 1 10 100 1797 g24 0.001 0.1 v s = 3v, 0v v in = 1.8v p-p v cm = 1.5v v s = 3v, 0v v in = 1.8v p-p v cm = 1v v s = 3v total a v = 1 f = 1khz output voltage (v p-p ) 0.01 thd + noise (%) 1 10 02 3 1797 g25 0.001 1 0.1 f = 1khzv cm = half supply r l = 10k a v = C1 v s = 3v, 0v a v = 1 v s = 3v, 0v a v = C1 v s = 1.5v a v = 1 v s = 1.5v 1797 g26 v s = 2.5v a v = 1 1797 g27 v s = 2.5v a v = 1 r l = 10k downloaded from: http:///
lt1797 8 1797fb applications information supply voltage the positive supply pin of the lt1797 should be bypassed with a small capacitor (about 0.1f) within an inch of the pin. when driving heavy loads an additional 4.7f electro- lytic capacitor should be used. when using split supplies the same is true for the negative supply pin. inputs the lt1797 is fully functional for an input signal range from the negative supply to the positive supply. figure 1 shows a simplified schematic of the amplifier. the input stage consists of two differential amplifiers, a pnp stage q3/q4 and an npn stage q1/q2 that are active over dif- ferent ranges of input common mode voltage. the pnp differential pair is active for input common mode voltages v cm between the negative supply to approximately 1.3v below the positive supply. as v cm moves closer toward the positive supply, the transistor qb1 will steer the tail current i1 to the current mirror q5/q6, activating the npn differential pair and the pnp pair becomes inactive for the rest of the input common mode range up to the positive supply. the input offset voltage and the input bias current are dependent on which input stage is active. the input offset voltage is trimmed on a single 5v supply with the common mode at 1/2 supply and is typically 1mv with the pnp stage active. the input offset of the npn stage is untrimmed and is typically 1.5mv. the input bias current polarity depends on the input common mode voltage. when the pnp dif- ferential pair is active, the input bias currents flow out of the input pins. they flow in the opposite direction when the npn input stage is active. the offset error due to the input bias currents can be minimized by equalizing the noninverting and inverting source impedance. the input stage of the lt1797 incorporates phase reversal protection to prevent false outputs from occurring when the inputs are driven up to 5v beyond the rails. protective resistors are included in the input leads so that current does not become excessive when the inputs are forced beyond the supplies or when a large differential signal is applied. output the output is configured with a pair of complementary common emitter stages q19/q20, which enable the output to swing from rail-to-rail. the output voltage swing of the lt1797 is affected by input overdrive as shown in the typi- cal performance characteristics. when monitoring input voltages within 50mv of v + or within 8mv of v C , some gain should be taken to keep the output from clipping. the output of the lt1797 can deliver large load currents; the short-circuit current limit is typically 50ma at 5v. take care to keep the junction temperature of the ic below the absolute maximum rating of 150c. the output of the amplifier has reverse biased diodes to each supply. if the output is forced beyond either supply, unlimited current will flow through these diodes. the lt1797 can drive capacitive loads up to 200pf on a single 5v supply in a unity gain configuration. when there is a need to drive larger capacitive loads, a resistor of a couple hundred ohms should be connected between the output and the capacitive load. the feedback should still be taken from the output so that the resistor isolates the capacitive load to ensure stability. the low input bias current of the lt1797 makes it possible to use high value feedback resistors to set the gain. however, care must be taken to insure that the pole formed by the feedback resistors and the total capacitance at the inverting input does not degrade stability. downloaded from: http:///
lt1797 9 1797fb applications information distortionthere are two main contributors to distortion in op amps: output crossover distortion as the output transitions from sourcing to sinking current and distortion caused by non- linear common mode rejection. if the op amp is operating in the inverting mode, there is no common mode induced distortion. if the op amp is operating in the pnp input stage (input is not within 1.3v of v + ), the cmrr is very good, typically 96db. when the lt1797 switches between input stages there is significant nonlinearity in the cmrr. lower load resistance increases the output crossover distortion, but has no effect on the input stage transition distortion. for lowest distortion the lt1797 should be operated single supply, with the output always sourcing current and with the input voltage swing between ground and (v + C 1.3v). see the typical performance characteristic curves. 1797 f01 q18 q1 q3 q4 qb1 q7 q11 q13 q9 q6 q2 q12 q8 q14 q10 q5 q17 q15 q19q20 q16 r1 r3 r4 r7 r8 r5r6 r2 d1 d2 Cin+in bias i1 out +1 +1 cm c1 c2 i3 i2 i4 i5 i6 i7 1/2 supply figure 1. simplified schematic downloaded from: http:///
lt1797 10 1797fb typical applications single supply hi-gain 80khz photodiode amplifier C + lt1797 3v 3v r21k r4 1k r5 100k r6 330 r310k r1100k c10.1f c20.1f c31000pf c p * 1797 ta02 *c p = sum of photodiode capacitance, parasitic layout capacitance and lt1797 input capacitance 10pf. transimpedance gain: a z = 10m. r6, c3 limit the noise bandwidth to 500khz. output noise 1.8mv rms . r1, c p and lt1797 gbw set upper limit on bandwidth. r4, c2 set lower 1.6khz limit on gain of 101. photodiode sfh213fa downloaded from: http:///
lt1797 11 1797fb typical applications ultralow noise, 5v supply, rail-to-rail output amplifier C + C + r1 10k r51k r3 4.99k r2 4.99k C5v C5v 5v 5v lt1028 lt1797 in out c12200pf r410 1797 ta03 total input voltage noise ? 0.94nv/ hz (including 10 resistor)bandwidth ? 40khz a v = 500 downloaded from: http:///
lt1797 12 1797fb package description s5 package 5-lead plastic tsot-23 (reference ltc dwg # 05-08-1635) 1.50 ?1.75 (note 4) 2.80 bsc 0.30 ?0.45 typ 5 plcs (note 3) datum ? 0.09 ?0.20 (note 3) s5 tsot-23 0302 rev b pin one 2.90 bsc (note 4) 0.95 bsc 1.90 bsc 0.80 ?0.90 1.00 max 0.01 ?0.10 0.20 bsc 0.30 ?0.50 ref note:1. dimensions are in millimeters 2. drawing not to scale 3. dimensions are inclusive of plating 4. dimensions are exclusive of mold flash and metal burr 5. mold flash shall not exceed 0.254mm 6. jedec package reference is mo-193 3.85 max 0.62 max 0.95 ref recommended solder pad layout per ipc calculator 1.4 min 2.62 ref 1.22 ref downloaded from: http:///
lt1797 13 1797fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number b 6/10 updated the last feature. updated the package description in the pin configuration section.updated v oh in the electrical characteristics section. replaced the package drawing in the package description section. 12 3 12 (revision history begins at rev b) downloaded from: http:///
lt1797 14 1797fb linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2000 lt 0610 rev b printed in usa related parts typical application 1mhz photodiode transimpedance amplifier response of photodiode amplifier rise time vs supply voltage (600mv output step) supply voltage 10% to 90% rise time 1.5v 830ns 2.5v 800ns 5v 700ns part number description comments lt1630/lt1631 dual/quad 30mhz, 10v/s rail-to-rail input and output op amps high dc accuracy, 525v v os(max) , 70ma output current, max supply current 4.4ma per amp lt1638/lt1639 dual/quad 1.2mhz, 0.4v/s, over-the-top? micropower rail-to-rail input and output op amps 170a supply current, single supply input range C0.4v to 44v, rail-to-rail input and output lt1783 micropower over-the-top sot-23 rail-to-rail input and output op amp sot-23 package, micropower 220a per amplifier, rail-to-rail input and output, 1.2mhz gain bandwidth lt1880 sot-23 rail-to-rail output, picoamp input current precision op amp 150v maximum offset voltage, 900pa maximum bias current, 1.1mhz gain bandwidth, C40c to 85c temperature range C + lt1797 photodiode sfh213fa siemens/infineon v s = 1.5v to 5v 3pf 100k v + v C 1797 ta04 1797 ta04b 2s/div 100mv/div downloaded from: http:///


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